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product structure silicon monolithic integrated circuit this product has no designed protection against radioactive ra ys 1/ 15 ? 20 15 rohm co., ltd. all rights reserved. www.rohm.c om tsz22111 ? 14 ? 001 tsz02201-0j2j0a900960-1-2 02.nov.2015 rev.001 termination regulator for ddr-sdrams BD3532F general description BD3532F is a termination regulator that complies with jedec requirements for ddr-sdram. this linear power supply uses a built-in n-channel mosfet and high -speed op-amps specially designed to provide excellent transient response. it has a sink/source current capability up to 3a and has a power supply bias requirement of 5.0v for driving the n-channel mosfet. by employing an independent reference voltage input (vddq) and a feedback pin (vtts), this termination regulator provides excellent output voltage accuracy and load regulation as required by jedec standards. additionally, BD3532F has a reference power supply output (vref) for ddr-sdram or for memory controllers. unlike the vtt output that goes to hi - z state, the vref output is kept unchanged when en input is changed to low, making this ic suitable for ddr- sdram under self refresh state. features ? incorporates a push-pull power supply for termination (vtt) ? incorporates a reference v ol tage circuit (vref) ? incorporates an enabler ? incorporates an undervoltage lockout (uvlo) ? incorporates a thermal shutdown protector (tsd) ? compatible with dual channel (ddr- ii) applications power supply for ddr i/ii - sdram key specifications ? termination input voltage range: 1.0v to 5.5v ? vcc input voltage range: 4.3v to 5.5v ? output voltage: 1/2xv vddq v(typ) ? output current: 3.0a(max) ? high side fet on-resistance: 0. 2 (typ) ? low side fet on-resistance: 0. 2 (typ) ? standby current: 0.8ma (typ) ? operating temperature range: -40c to + 10 0c package w(typ) x d(typ) x h(max) typical application circuit , block diagram sop8 5.00mm x 6.20mm x 1.71mm reference block thermal protection vcc vcc vcc uvlo 50k 50k tsd vcc vcc soft uvlo tsd en uvlo tsd en uvlo vcc vref vddq ? x vtts vtt vtt vddq vtt_in vddq vtt_in uvlo gnd enable en en datashee t datashee t downloaded from: http:///
BD3532F 2/ 15 ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a900960-1-2 02.nov.2015 rev.001 pin configuration pin descriptions pin no. pin name pin function 1 gnd gnd pin 2 en enable input pin 3 vtts detector pin for termination voltage 4 vref reference voltage output pin 5 vddq reference voltage input pin 6 vcc vcc pin 7 vtt_in termination input pin 8 vtt termination output pin description of blocks 1. vcc the vcc pin is for the independent power supply input that operates the internal circuit of the ic. it is the voltage at this pin that dr ives the ics amplifier circuits. the vcc input ranges 5v and maximum current consumption is 4ma. a bypass capacitor of 1f or so should be connected to this pin whe n using the ic in an application circuit. 2. vddq this is the power supply input pin for an i nternal voltage divider network. the voltage at vddq is halv ed by two 50k internal voltage-divider resistors and the resulting volt age serves as reference for the vtt output. since vtt = 1/2vddq, the jedec requirement for ddr-sdram can be satisfied by supplying the correct voltage to vddq. noise input should be avoided at the vddq pin as it is also included by the voltage-divider at the output. an rc filter consisting of a resistor and a capacitor (220? and 2.2f, f or instance,) may be used to reduce the n oise input but make sure that it will not significantly affect the voltage- dividers output . 3. vtt_in vtt_in is the power supply input pin for the vtt output. input v oltage may range from 1.0v to 5.5v, but consideration must be given to the current limit dictated by th e on-resistance of the ic and to the change in allowable loss due to input/output voltage difference. generally, the following voltages are supplied: ? ddr i v vtt_in =2.5v ? ddrii v vtt_in =1.8v take note that a high impedance voltage input at vtt_in may result in oscillation or degradation in ripple rejecti on, so connecting a 10 f capacitor with minimal change in capacitance to vtt_in terminal is recommended. however, this impedance may depend on the characteristics of the powe r supply input and the impedance of the pc b wiring, which must be carefully checked before use. 4. vref BD3532F provides a constant voltage, vref, which is indepen dent from the vtt output and can serve as reference input for memory controllers and drams. the voltage level o f vref is kept constant even if the en pin is at low level, making the use of this ic compatible with the self refres h state of drams. in order to stabilize the output voltage, connecting the c orrect combination of capacitor and resistor to vref is necessary. for this purpose, a combination of 1.0f to 2.2f ceramic capacitor, characterized by minimal variation in capacitance, and a 0.5? to 2.2? phase compensating resistor is recommended. a 10f ce ramic or tantalum capacitor can also be used. the maximum current capability of the vref pin is 20ma. 5. vtts vtts is a sense pin for the load regulation of the vtt output voltage. in case the wire connecting vtt pin and the load is too long, connecting vtts pin to the part of the wire nearer to the load may improve load regulation. vtt_in gnd en vtts vref vtt vcc vddq 1 2 3 4 5 6 7 8 top view downloaded from: http:///
BD3532F 3/ 15 ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a900960-1-2 02.nov.2015 rev.001 description of blocks C continued 6. vtt this is the output pin for the ddr memory termination volta ge and it has a sink/source current capability of 3.0a. vtt voltage tracks the voltage at vddq pin divided in half. the output is turned off when en pin is low or when eithe r the vcc uvlo or the thermal shutdown protection function is activated. always connect a capacitor to vtt pin for loop gain and p hase compensation and for reduction in output voltage variation in the event of sudden load change. be careful in choosing the capacitor as insufficient capacitance may cause oscillation and high esr (equivalent series resistanc e) may result in increased output voltage variation durin g a sudden change in load. using a low-esr ceramic capacito r, however, may reduce the loop gain and phase margin and may cause oscillation. but this effect can be lessened by c onnecting a resistor in series with the ca pacitor. a 220f functional polymer capacitor (os-con, pos-cap, neo-cap) is recommen ded, though ambient temperature and other conditions should also be considered . 7. en a high input of 2.3v or higher to en turns on the vtt output. a low input of 0.8v o r less, on the other hand, turns vtt to a hi- z state. with a low en input, however, the vref output remains on, provided that sufficient vcc and vddq voltages have been established. absolute maximum ratings parameter symbol limit unit input voltage v cc 7 (note 1) v enable input voltage v en 7 (note 1) v termination input voltage v vtt_in 7 (note 1) v vddq reference voltage v v ddq 7 (note 1) v output current i v tt 3 a power dissipation1 pd 1 0. 56 (note 2) w power dissipation2 pd 2 0. 69 (note 3) w operating temperature range topr - 40 to + 100 c storage temperature range tstg - 55 to +1 50 c maximum junction temperature tjmax +150 c (note 1) should not exceed pd. (note 2) derate by 4.48mw /c for ta over 25c (with no heat sink). (note 3) derate by 5.52mw /c for ta over 25c (when mounted on a board 70mm x 70mm x 1.6mm glass-epoxypcb). caution: operating the ic over the absolute maximum ratings may damage the ic. in addition, it is impossible to predict all destructive situatio ns such as short-circuit modes, open circuit modes, etc. therefore, it is important to consider circuit protection measures, like adding a fuse, in case the ic is operat ed in a special mode exceeding the absolute maximum ratings. recommended operating conditions (ta=25 c ) parameter symbol min max unit input voltage v cc 4.3 5.5 v termination input voltage v vtt_in 1.0 5.5 v en input voltage v en -0.3 +5.5 v downloaded from: http:///
BD3532F 4/ 15 ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a900960-1-2 02.nov.2015 rev.001 electrical characteristics (unless otherwise noted, ta=25 c v cc =5v v en =3v v v ddq =2.5v v vtt_in =2.5v ) parameter symbol standard value unit conditions min typ max standby current i st - 0.8 1.6 ma v en =0v bias current i cc - 2 4 ma [enable] hi level enable input voltage v enhi 2.3 - 5.5 v v cc =4.3v to 5.5v ta=0 c to 100 c (note 4) low level enable input voltage v enlow -0.3 - +0.8 v v cc =4.3v to 5.5v ta=0 c to 100 c (note 4) enable pin input current i en - 7 10 a v en =3v [termination] termination output voltage v v tt v vref -30mv v vref v vref +30mv v i out =-3a to + 3a ta=0 c to 100 c (note 4) source current i v tt+ 3 - - a sink current i v tt - - - -3 a load regulation ? v vtt - - 40 mv i out =-3a to + 3a line regulation reg.l - 20 40 mv v cc =4.3v to 5.5v upper side on-resistance r hron - 0.2 0.4 lower side on-resistance r lron - 0.2 0.4 [input of reference voltage] input impedance z vddq 70 100 130 k output voltage1 v vref1 1/2 x v vddq -30mv 1/2 x v vddq 1/2 x v vddq +30mv v i vref =0ma output voltage2 v vref2 1/2 x v vddq -40mv 1/2 x v vddq 1/2 x v vddq +40mv v i vref =-10ma to 10ma ta=0 c to 100 c (note 4) output voltag e1 v vref1 1/2 x v vddq -30mv 1/2 x v vddq 1/2 x v vddq +30mv v v vddq =v vtt_in =1.8v i vref =0ma output voltage2 v vref2 1/2 x v vddq -40mv 1/2 x v vddq 1/2 x v vddq +40mv v v vddq =v vtt_in =1.8v i vref =-10ma to 10ma ta=0 c to 100 c (note 4) source current1 i vref1+ 20 - - ma sink current1 i vref1- - - - 20 ma source current2 i vref2+ 20 - - ma v vddq =v vtt_in =1.8v sink current2 i vref2- - - - 20 ma v vddq =v vtt_in =1.8v [uvlo] uvlo off voltage v uvlo 4.0 4.15 4.3 v vcc : sweep up hysteresis voltage ? v uvlo 100 160 220 mv vcc : sweep down (note 4) no tested on outgoing inspection downloaded from: http:///
BD3532F 5/ 15 ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a900960-1-2 02.nov.2015 rev.001 typical waveforms v v tt (10mv/div) i v tt (1a/div) 10sec/div figure 1. ddr i (- 1a +1a) v v tt (10mv/div) i v tt (1a/div) 10sec/div figure 2. ddri (+ 1a -1a) v v tt (10mv/div) i v tt (1a/div) 10sec/div figure 3 . ddr ii (- 1a +1a) v v tt (10mv/div) i v tt (1a/div) 10sec/div figure 4. ddr ii (+ 1a - 1a ) downloaded from: http:///
BD3532F 6/ 15 ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a900960-1-2 02.nov.2015 rev.001 typical waveforms C continued v cc v en v vddq v vtt_in v vtt figure 5. input sequence 1 v cc v en v vddq v vtt_in v vtt figure 6. input sequence 2 v cc v en v vddq v vtt_in v vtt figure 7. input sequence 3 v vtt_in v vref v vtt (1a/div) i vtt_in figure 8 . s tart-up waveform downloaded from: http:///
BD3532F 7/ 15 ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a900960-1-2 02.nov.2015 rev.001 typical performance curves 1.244 1.246 1.248 1.250 1.252 1.254 1.256 1.258 -2 -1 0 1 2 itt(a) vtt(v) figure 11 . terminal output voltage vs output current (ddr-i) output current : i vtt (a) terminal output voltage : v vtt (v) 1.248 1.249 1.25 1.251 1.252 -10 -5 0 5 10 iref(ma) vref(v) figure 9 . output voltage vs i vref (ddr-i) i vref (ma) output voltage : v vref (v) 0.897 0.898 0.899 0.9 0.901 0.902 -10 -5 0 5 10 iref(ma) vref(v) figure 10 . output voltage vs i vref (ddr- ii ) i vref (ma) output voltage : v vref (v) 0.89 0.89 0.90 0.90 0.90 0.90 0.90 0.91 0.91 -2 -1 0 1 2 itt(a) vtt (v) 0.896 0.898 0.900 0.902 0.904 0.906 0.908 0.910 0.912 figure 12 . terminal output voltage vs output current (ddr ii ) output current : i vtt (a) terminal output voltage : v vtt (v) downloaded from: http:///
BD3532F 8/ 15 ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a900960-1-2 02.nov.2015 rev.001 application information 1. evaluation board part no value company parts name part no value company parts name u1 - rohm BD3532F c 4 - - - r 1 - - - c 5 10 f kyocera cm21b106m06a r 4 220 rohm mcr03 c 6 - - - j1 0 - - c 7 - - - j2 0 - - c 8 - - - c 1 - - - c 9 2.2 f kyocera cm105b225k06a c 2 10 f kyocera cm21b106m06a c 10 220 f sanyo 2r5tpe220mf c 3 1f kyocera cm105b105k06a BD3532F evaluation board application components BD3532F evaluation board circuit c 5 ,c 6 gnd en vcc vddq vtt_in gnd v cc sw1 j2 r 4 c 9 j1 c 3 ,c 4 c 7 c 8 c 10 c 2 c 1 r 1 2 7 5 6 1 8 3 4 u1 vtt_in v cc v tt vref v ddq en vtts gnd vtt vtts vref BD3532F downloaded from: http:///
BD3532F 9/ 15 ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a900960-1-2 02.nov.2015 rev.001 2. power dissipation in thermal design, consider the temperature range wherein th e ic is guaranteed to operate and apply appropriate margins. the temperature conditions that need to be conside red are listed below: (1) ambient temperature ta: 100c or lower (2) chip junction temperature tj: 150c or lower the chip s junction temperature tj can be considered as follows. (see the diagram below for ja.) most heat loss in BD3532F occurs at the output n-channel fet. the lost power is determined by multiplying the voltage between in and out by the output current. since this ic is packaged for high -power application, its thermal derating characteristics significantly depend on the pcb . so when designing, the size of the pcb to be used should be carefully considered. power dissipation (w) = {input voltage (v v tt _ in ) C output voltage (v v tt =1/2v v ddq )} x i out (ave) for instance, v vtt_in =1.8v , v v ddq =1.8v, and i out (ave)=0.5 a . the power dissipation is determined as follows: { } 0.4(w) = 0.5(a) (v) 0.9 - (v) 1.8 = (w) n dissipatio power sop8 (1) 70mm x 70mm x 1.6mm glass-epoxy pcb j -c=181c/w (2) with no heat sink j -a=222c/w power dissipation [pd] ambient temperature [ta] 100 c 100 0.6 0 25 75 125 150 50 0. 2 0. 1 0 [ c ] 0. 4 0. 5 0.3 [w] (2) 0. 56w (1) 0. 69w 0. 7 downloaded from: http:///
BD3532F 10 / 15 ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a900960-1-2 02.nov.2015 rev.001 operational notes 1. reverse connection of power supply connecting the power supply in reverse polarity can damage the ic. take precautions against reverse polarity when connecting the power supply, such as mounting an externa l diode between the power supply and the ic s power supply pin s. 2. power supply lines design the pcb layout pattern to provide low impedance supp ly lines. separate the ground and supply lines of the digital and analog blocks to prevent noise in the groun d and supply lines of the digital block from affecting th e analog block. furthermore, connect a capacitor to ground at all powe r supply pins . consider the effect of temperature and aging on the capacitance value when using electrolytic capa citors. 3. ground volta ge ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. 4. ground wiring pattern when using both small-signal and large-current ground traces, the two ground traces should be routed separately but co nnected to a single ground at the reference point of the a pplication board to avoid fluctuations in the small-sign al ground caused by large currents. also ensure that the ground traces of external components do not cause variations on the ground voltage. the ground lines must be as short and thick as possible to reduce line impedance. 5. thermal consideration should by any chance the power dissipation rating be exc eeded the rise in temperature of the chip may result in deterioration of the properties of the chip. in case of exceeding thi s absolute maximum rating, increase the board size and copper area to prevent exceeding the pd rating. 6. recommended operating conditions these conditions represent a range within which the expec ted characteristics of the ic can be approximately obtained . the electrical characteristics are guaranteed under the condi tions of each parameter. 7. inrush current when power is first supplied to the ic, it is possible that th e internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequen ce and delays, especially if the ic has more than one po wer supply. therefore, give special consideration to power cou pling capacitance, power wiring, width of ground wiring, and routing of connections. 8. operation under strong electromagnetic field operating the ic in the presence of a strong electromagnetic field ma y cause the ic to malfunction. 9. testing on application boards when testing the ic on an application board, connecting a capacitor directly to a low-impedance output pin may subject the ic to stress. always discharge capacitors compl etely after each process or step. the ics power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. to prevent damage from static discharge, ground the ic during assembly and use similar precautions during transport and storage. 10. inter-pin short and mounting errors ensure that the direction and position are correct when moun ting the ic on the pcb. incorrect mounting may result in damaging the ic. avoid nearby pins being shorted to each other especially to ground, power supply and output pin . inter-pin shorts could be due to many reasons such as m etal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins du ring assembly to name a few. 11. unused input pins input pins of an ic are often connected to the gate of a mos tra nsistor. the gate has extremely high impedance and extremely low capacitance. if left unconnected, the elec tric field from the outside can easily charge it. the smal l charge acquired in this way is enough to produce a signi ficant effect on the conduction through the transistor and cause unexpected operation of the ic. so unless otherwise sp ecified, unused input pins should be connected to the power supply or ground line. downloaded from: http:///
BD3532F 11 / 15 ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a900960-1-2 02.nov.2015 rev.001 operational notes C continued 12. regarding the input pin of the ic this monolithic ic contains p+ isolation and p substrate l ayers between adjacent elements in order to keep them isolated. p-n junctions are formed at the intersection of t he p layers with the n layers of other elements, creating a parasitic diode or transistor. for example (refer to figure below): when gnd > pin a and gnd > pin b, the p-n junction operates as a paras itic diode. when gnd > pin b, the p-n junction operates as a parasitic transistor. parasitic diodes inevitably occur in the structure of the ic. the operation of parasitic diodes can result in mutual interference among circuits, operational faults, or physica l damage. therefore, conditions that cause these diodes to operate, such as applying a voltage lower than the gnd vo ltage to an input pin (and thus to the p substrate) should be avoided. figure 13. example of monolithic ic structu re 13. thermal shutdown circuit(tsd) this ic has a built-in thermal shutdown circuit that preven ts heat damage to the ic. normal operation should always be within the ics power dissipation rating. if however the rating is exceeded for a continued period, the junction temperature (tj) will exceed 175 c which will activate the tsd circuit that will turn off al l output pins. when the tj falls below the tsd threshold, the circuits are automatically restore d to normal operation. note that the tsd circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no circumstances, should the tsd circuit be used in a set desi gn or for any purpose other than protecting the ic from heat damage. 14. capacitor across output and gnd if a large capacitor is connected between the output pin and ground pin, current from the charged capacitor can flo w into the output pin and may destroy the ic when the vcc or in pin is shorted to ground or pulled down to 0v. use a capacitor smaller than 10 00 f between output and ground. 15. output capacitor do not fail to connect a output capacitor to vref output terminal for s tabilization of output voltage. the capacitor connected to vref output terminal works as a loop gain phase compensator. insufficient capacitance may cause an oscillation. it is recommended to use a low temperature coe fficient 10 f ceramic capacitor, though it depends on ambient temperature and load conditions. it is therefore reque sted to carefully check under the actual temperature and load conditions to be applied. 16. output capacitor do not fail to connect a capacitor to vtt output pin for stabi lization of output voltage. this output capacitor works as a loop gain phase compensator and an output voltage varia tion reducer in the event of sudden change in load. insufficient capacitance may cause an oscillation. and if the e quivalent series resistance (esr) of this capacitor is high, the variation in output voltage increases in the event of s udden change in load. it is recommended to use a 220 f functional polymer capacitor, though it depends on ambie nt temperature and load conditions. using a low esr ceramic capacitor may reduce a loop gain phase margin and cau se an oscillation, which may be improved by connecting a resistor in series with the capacitor. it is therefore reques ted to carefully check under the actual temperature and l oad conditions to be applied. n n p + p n n p + p substrate gnd n p + n n p + n p p substrate gnd gnd parasitic elements pin a pin a pin b pin b b c e parasitic elements gnd parasitic elements c be transistor (npn) resistor n region close-by parasitic elements downloaded from: http:///
BD3532F 12 / 15 ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a900960-1-2 02.nov.2015 rev.001 operational notes C continued 17. input capacitors these input capacitors are used to reduce the output imp edance of power supply to be connected to the input terminals (vcc and vtt_in). increase in the power supply output impedance m ay result in oscillation or degradation in ripple rejecting characteristics. it is recommended to use a low temp erature coefficient 1f (for vcc) and 10f (for vtt_in) capacitor, but it depends on the characteristics of the power supp ly input, and the capacitance and impedance of the pc board wiring pattern. it is therefore requested to care fully check under the actual temperature and load conditions to be applied. 18. input terminals (vcc, vddq, vtt_in and en) vcc, vddq, vtt_in and en terminals of this ic are made up indepen dent from one another. to vcc terminal, the uv lo function is provided for malfunction protection. irresp ective of the input order of the inputs terminals, vtt output is activated to provide the output voltage when uvlo and en voltages reach the threshold voltage, while vref output is activated when uvlo voltage reaches the threshold. if vddq and vtt_in terminals have equal potential and common impedance, any change in current at vtt_in terminal ma y result in variation of vtt_in voltage, which affects vddq terminal and may cause variation in the output voltage . it is therefore required to perform wiring in such manner that vddq and vtt_in terminals may not have common impedance . if impossible, take appropriate corrective measures including suitable cr filter to be inserted between vddq an d vtt_in terminals. 19. vtts terminal this terminal is used to improve load regulation of vtt ou tput. the connection with vtt terminal must be done so that it would not have a common impedance with high current line fo r better load regulation of vtt output. 20. operating range within the operating range, the operation and function of the circuits are generally guaranteed at an ambient temperature within the range specified. the values specifie d for electrical characteristics may not be guaranteed, but drastic change may not occur to such characteristics within the operating range. 21. built-in thermal shutdown protection circuit thermal shutdown protection circuit is built-in to preven t thermal breakdown. turns vtt output to off when the thermal shutdown protection circuit activates. this thermal shutdown protection circuit is originally intended to prot ect the ic itself. it is therefore requested to conduct a thermal design not to exceed the temperature under which the thermal shutdown protection circuit can work. 22. in the event that load containing a large inductance component is connected to the output terminal, and generation of back-emf at th e start-up and when output is turned off is assumed, it is requested to insert a protection diode. 23. application circuit although we can recommend the application circuits containe d herein with a relatively high degree of confidence, we ask that you verify all characteristics and specif ications of the circuit as well as its performance under actual conditions. please note that we cannot be held responsible for problems that may arise due to patent infringements or noncompliance with any and a ll applicable laws and regulations. output pin (example) downloaded from: http:///
BD3532F 13 / 15 ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a900960-1-2 02.nov.2015 rev.001 ordering information b d 3 5 3 2 f - e 2 part number package f : sop8 packaging and forming specification e2: embossed tape and reel marking diagram sop8 (top view) d 3 5 3 2 part number marking lot number 1pin mark downloaded from: http:///
BD3532F 14 / 15 ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a900960-1-2 02.nov.2015 rev.001 physical dimension, tape and reel information package name sop8 (unit : mm) pkg : sop8 drawing no. : ex112-5001-1 (max 5.35 (include.burr)) downloaded from: http:///
BD3532F 15 / 15 ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a900960-1-2 02.nov.2015 rev.001 revision history date revision changes 02.nov.2015 001 new release downloaded from: http:///
datasheet d a t a s h e e t notice-pga-e rev.00 2 ? 2015 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. our products are designed and manufac tured for application in ordinary elec tronic equipments (such as av equipment, oa equipment, telecommunication equipment, home electroni c appliances, amusement equipment, etc.). if you intend to use our products in devices requiring ex tremely high reliability (such as medical equipment (note 1) , transport equipment, traffic equipment, aircraft/spacecra ft, nuclear power controllers, fuel c ontrollers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (?specific applications?), please consult with the rohm sale s representative in advance. unless otherwise agreed in writing by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ro hm?s products for specific applications. (note1) medical equipment classification of the specific applications japan usa eu china class class class b class class ? class 2. rohm designs and manufactures its products subject to strict quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe desi gn against the physical injury, damage to any property, which a failure or malfunction of our products may cause. the following are examples of safety measures: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditio ns, as exemplified below. accordin gly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of an y rohm?s products under any special or extraordinary environments or conditions. if you intend to use our products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] use of our products in any types of liquid, incl uding water, oils, chemicals, and organic solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products ar e exposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed to static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing components, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (ev en if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subjec t to radiation-proof design. 5. please verify and confirm characteristics of the final or mounted products in using the products. 6. in particular, if a transient load (a large amount of load applied in a short per iod of time, such as pulse. is applied, confirmation of performance characteristics after on-boar d mounting is strongly recomm ended. avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading c ondition may negatively affect product performance and reliability. 7. de-rate power dissipation depending on ambient temperature. when used in sealed area, c onfirm that it is the use in the range that does not exceed t he maximum junction temperature. 8. confirm that operation temperat ure is within the specified range described in the product specification. 9. rohm shall not be in any way responsible or liable for fa ilure induced under deviant condi tion from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlori ne, bromine, etc.) flux is used, the resi due of flux may negatively affect product performance and reliability. 2. in principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must be used on a through hole mount products. if the flow sol dering method is preferred on a surface-mount products, please consult with the rohm representative in advance. for details, please refer to rohm mounting specification downloaded from: http:///
datasheet d a t a s h e e t notice-pga-e rev.00 2 ? 2015 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, pl ease allow a sufficient margin considering variations of the characteristics of the products and external components, including transient characteri stics, as well as static characteristics. 2. you agree that application notes, re ference designs, and associated data and in formation contained in this document are presented only as guidance for products use. theref ore, in case you use such information, you are solely responsible for it and you must exercise your own indepen dent verification and judgment in the use of such information contained in this document. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take proper caution in your manufacturing process and storage so that voltage exceeding t he products maximum rating will not be applied to products. please take special care under dry condit ion (e.g. grounding of human body / equipment / solder iron, isolation from charged objects, se tting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriora te if the products are stor ed in the places where: [a] the products are exposed to sea winds or corros ive gases, including cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to di rect sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage c ondition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm sol derability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the co rrect direction, which is indicated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. use products within the specified time after opening a humidity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage time period. precaution for product label qr code printed on rohm products label is for rohm?s internal use only. precaution for disposition when disposing products please dispose them proper ly using an authorized industry waste company. precaution for foreign exchange and foreign trade act since concerned goods might be fallen under listed items of export control prescribed by foreign exchange and foreign trade act, please consult with rohm in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to application example contained in this document is for reference only. rohm does not warrant that foregoi ng information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. 2. rohm shall not have any obligations where the claims, actions or demands arising from the co mbination of the products with other articles such as components, circuits, systems or external equipment (including software). 3. no license, expressly or implied, is granted hereby under any intellectual property rights or other rights of rohm or any third parties with respect to the products or the informati on contained in this document. pr ovided, however, that rohm will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to manufacture or sell products containing the produc ts, subject to the terms and conditions herein. other precaution 1. this document may not be reprinted or reproduced, in whol e or in part, without prior written consent of rohm. 2. the products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 3. in no event shall you use in any wa y whatsoever the products and the related technical information contained in the products or this document for any military purposes, incl uding but not limited to, the development of mass-destruction weapons. 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties. downloaded from: http:///
datasheet datasheet notice ? we rev.001 ? 201 5 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. downloaded from: http:///

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